Tag Archives: 1us

Think FPGA HFT trade in 1us latency ? Think lower!

Think FPGAs trade in 1us latency ? Think lower!

These articles are from a highly talented HFT C++ senior developer. Rare treat indeed

https://www.linkedin.com/pulse/think-fpgas-trade-1us-latency-lower-yoav-karmon

https://www.linkedin.com/pulse/agile-fpga-development-flow-yoav-karmon?trk=mp-reader-card

https://www.linkedin.com/pulse/agile-fpga-development-flow-part-ii-yoav-karmon

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NOTE I now post my TRADING ALERTS into my personal FACEBOOK ACCOUNT and TWITTER. Don't worry as I don't post stupid cat videos or what I eat!