There is a panel discussion for High Level Design in FPGA, CUDA, OpenCL etc at ERSA in Vegas

There is a panel discussion for High Level Design in FPGA, CUDA, OpenCL etc at ERSA in Vegas International Gathering for Application Developers! ERSA Conference, July 16-19, 2012, Las Vegas, USA. (ERSA’12 Homepage: http://ersaconf.org/ersa12): Panel Discussion Session “High Level Design for FPGAs: OpenCL, Space Codesign, Cuda …” A range of complex, intelligent embedded applications require …

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