Tag Archives: hybrid computing

what do you’ll think of a CPU, GPGPU, FPGA hybrid computing platform..any body working on something like this?

what do you’ll think of a CPU, GPGPU, FPGA hybrid computing platform..any body working on something like this?
==Have worked with custom IC design before
==Mixed processor technology (uP/FPGA/GPU) systems have the potential for delivering extraordinary performance givine their modest SWaP (size, weight, and power) footprint. The econonmics of these systems is also compelling– multi-TFLOP’s in a $10-$15,000 package is hard to ignore.
But this combination of high performance and small SWaP comes at a price; they are notoriously diffiuclt to program requiring multiple technical specialists on the application development team. Still, new products such as our hprcARCHITECT make using them much easier than with traditional developmnet approaches.
I put together a system for delivery to the US Air Force that combined a motherboard with two Intel i7 uP’s, four Xilinx FPGA’s, and two nVIDIA TESLA GPU’s. To say the very least– it screamed. It also demonstrated that there is no performance difference between Windows and Linux for high-performance applications. But Windows code is significantly easier/faster to get into production giving it an edge in total time to first solution.
==I worked on FPGA board + PC implementation before. One can easily speed up the overall system performance by moving some lower-level processing into FPGA chip. The capability of embedding a CPU inside of the FPGA and having some control program running in the FPGA also provide some further flexibility. However, debugging in this kind of system is very troublesome and it is much more likely to have bugs in a hybrid system than the regular software environment.
==I agree with James– hybrid systems will, initially, be buggy. But this can we dealt-with by choosing the right development tools and working from a good specification to begin with. Hybrid systems are no place for “hackers”– they take solid engineering and well designed tools.
More development projects are buggy due to a poorly engineered software specification (including theĀ ==
Funny that – we filed a patent on this in December of last year…

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