I just made some awesome progress with my Matlab and Simulink. I even made some videos on it:
Essentially, I have gone from a visual trading idea via Matlab’s Simulink to generate source code to C or C++. I could even do the same process for HDL (hardware description languages) for FPGA deployment for ultra-lowest latency. As a result, I will dedicate April 7th to do a complete LIVE Q&A on this to answer your questions. Watch these video to see what questions you come up with. I will be only tackling this topic this one time as it looks like this will become my new standard for developing market ideas into a self-contained systematic trading models for C/C++ or FPGA deployment.
1. Please join my meeting, April 7, 2015 at 7:00 PM Eastern Daylight Time.
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