Webinar of MATLAB Simulink model and Stateflow chart for trading with generation to C C++ HDL for HFT with FPGA deployment
This occurs Monday May 13 at 7PM Eastern Standard Time
1. Sample trading model presented within Simulink with historical market data capture
2. Data flow of Stateflow visual chart for trading signal generation
3. Various techniques for C and C++ code generation walkthrough
4. Potential walkthrough of HDL or Verilog for FPGA deployment using Vertex or Xilinx boards. This is the ultra lowest latency option for those interested in HFT deployment
5. Question and answer period
This is EXCLUSIVELY for my QuantLabs.net Premium Members. Get access here.FACEBOOK ACCOUNT and TWITTER. Don't worry as I don't post stupid cat videos or what I eat!