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Youtube videos on FPGA webinars for HFT. Could Matlab expedite development in these webinars?

(Last Updated On: December 6, 2012)

Youtube videos on FPGA webinars for HFT. Could Matlab expedite development in these webinars?

This video demonstrates first use of real world use of FPGA uses in modern HFT operations. A few notes is that FPGA reduces latency to 200 nanoseconds. There are comparisons of software and GPU options but still FPGA is still best.

This is the maker from the presentation. I do believe these will be very expensive options http://algo-logic.com/

Matlab could be a decent comparison to expedite the development as explained in the video. Some webinars to note include:

http://www.mathworks.com/company/events/webinars/series/fpga-design/

A decent starting point: http://www.mathworks.com/fpga-design/

http://www.mathworks.com/company/events/webinars/webinarconf.html?id=50008&language=en&confirmation_page&wfsid=4142397

http://www.mathworks.com/company/events/webinars/wbnr49891.html?id=49891&p1=724751333&p2=724751342

The one below is decent overview of the workflow for any algorithm to be implemented into an FPGA with something like Alera: (Also mentioned are the Altera DSP Builder and DSP Builder Advanced Blockset. This also targets a Quartus II board)

http://www.mathworks.com/company/events/webinars/wbnr60358.html?id=60358&p1=942727305&p2=942727310

Decent overview of the entire workflow of Model Based Design. Also uses Stratix II FPGA board with a very good intro to Simulink

http://www.mathworks.com/company/events/webinars/wbnr69754.html

You can use Simulink to build use multiple models as well,

http://www.mathworks.com/company/events/webinars/wbnr50252.html?id=50252&p1=786142039&p2=786142051

http://www.mathworks.com/company/events/webinars/series/altera-fpga-design/

http://www.mathworks.com/company/events/webinars/wbnr30807.html?id=30807&p1=31216&p2=31217

http://www.mathworks.com/company/events/webinars/wbnr50252.html?id=50252&p1=786142039&p2=786142051

note that Xilinx support for above webinar includes Virtex-6 and Spartan6 but this webinar is from 2010. Here is an amazing stat, you can operate 2016 operations in 1 clock cycle on the high end Xilinx FPGA card.

NOTE I now post my TRADING ALERTS into my personal FACEBOOK ACCOUNT and TWITTER. Don't worry as I don't post stupid cat videos or what I eat!

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