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There is a panel discussion for High Level Design in FPGA, CUDA, OpenCL etc at ERSA in Vegas

(Last Updated On: June 22, 2012)

There is a panel discussion for High Level Design in FPGA, CUDA, OpenCL etc at ERSA in Vegas

International Gathering for Application Developers!
ERSA Conference, July 16-19, 2012, Las Vegas, USA. (ERSA’12 Homepage: http://ersaconf.org/ersa12):

Panel Discussion Session
“High Level Design for FPGAs: OpenCL, Space Codesign, Cuda …”

A range of complex, intelligent embedded applications require high-performance systems implemented as multicore systems and heterogeneous parallel processing systems. This involves reconfigurable computing technologies across mobile, embedded, and HPC domains. For many applications, FPGAs are a tremendously efficient computational fabric. The traditional design systems use low-level Hardware Design Languages.

When it comes to developing complex heterogeneous systems, a level of abstraction that is closer to traditional software-centric approaches is required. Languages and design techniques high-level abstractions allow us to tradeoff some efficiency for added designer productivity. These techniques are coming more and more popular among design community.

In this discussion session, we will concentrate, but not limiting, on the following high-level design systems and languages.
• OpenCL
• Space Codesign
• Cuda
• …

If you are interested in participation, being a panel member, make a statement or short presentation, contact with us at inf@ersaconf.org

Send us abstract of your statement, presentation.
Deadline for abstract: end of June.
Full text, if you are interested, should be submitted after the conference, July 30.

Call for ERSA Sponsorship International Gathering for App Develeoper

semiwiki.com

International Gathering for Application Developers! Commercial & Academic July 16-19, 2012, Las Vegas, USA ersaconf.org/ersa-news The information age continues to surprise and challenge us all in the fast pace of evolving…

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This is an excellent topic. I have been involved with FPGA technology on the embedded side for the past 15 years and I have always been a big advocate of the technology moving to the general computing domain. The major barrier is the abstraction piece and it really is going to take effort outside of the silicon vendors to advance this possibility. I have seen the advantages of programmable hardware and it will be a real eye opener to computing programmers when they can actually take advantage of the technology through their standard design flows This will make for a very good discussion.

 

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We welcome everybody who is interested in participating in this panel. If you want to be a panel member, make just a short statement, or even a regular presentation of 20 min., contact me by email org@ersaconf.org. You should send a short abstract, the full paper, if you are interested, is required after the conference.

 

NOTE I now post my TRADING ALERTS into my personal FACEBOOK ACCOUNT and TWITTER. Don't worry as I don't post stupid cat videos or what I eat!

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